18-bit registered transceive r cy74fct163500 sccs066 - june 1997 - revised march 2000 data sheet acquired from cypress semiconductor corporation. data sheet modi?ed to remove devices not offered. copyright ? 2000, texas instruments incorporated features ? low power, pin-compatible replacement for lcx and lpt families ? 5v tolerant inputs and outputs ? 24 ma balanced drive outputs ? power-off disable outputs permits live insertion ? edge-rate control circuitry for reduced noise ? fct-c speed at 4.6 ns ? latch-up performance exceeds jedec standard no. 17 ? esd > 2000v per mil-std-883d, method 3015 ? typical output skew < 250ps ? industrial temperature range of C40?c to +85?c ? tssop (19.6-mil pitch) or ssop (25-mil pitch) ? typical v olp (ground bounce) performance exceeds mil std 883d ?v cc = 2.7v to 3.6v functional description the cy74fct163500 is an 18-bit universal bus transceiver that can be operated in transparent, latched, or clock modes by combining d-type latches and d-type ?ip-?ops. data ?ow in each direction is controlled by output-enable (oeab and o eba), latch enable (leab and leba), and clock inputs ( clkab and clkba) inputs. for a-to-b data ?ow, the device operates in transparent mode when leab is high. when leab is low, the a data is latched if clkab is held at a high or low logic level. if leab is low, the a bus data is stored in the latch/?ip-?op on the high-to-low transition of clkab. oeab performs the output enable function on the b port. data ?ow from b-to-a is similar to that of a-to-b and is controlled by oeba, leba, and clkba. the cy74fct163500 has 24-ma balanced output drivers with current limiting resistors in the outputs. this reduces the need for external terminating resistors and provides for minimal undershoot and reduced ground bounce.the inputs and outputs are capable of being driven by 5.0v busses, allowing them to be used in mixed voltage systems as translators. the outputs are also designed with a power off disable feature enabling them to be used in applications requiring live insertion. gnd logic block diagram pin configuration 1 2 3 4 5 6 7 8 9 10 11 12 33 32 31 30 29 36 35 oeab 34 ssop/tssop top view 13 14 15 16 17 18 19 20 21 22 23 24 45 44 43 42 41 37 38 39 40 48 47 46 leab a 1 a 2 a 3 b 1 b 2 b 3 gnd gnd gnd v cc a 6 a 7 a 4 a 5 b 4 b 5 b 6 b 7 v cc gnd a 10 a 11 a 8 a 9 b 8 b 9 b 11 b 12 gnd a 12 v cc a 16 gnd a 14 v cc a 15 a 17 to 17 other channels leab oeba leba clkab clkba oeab c d c d c d c d a 1 b 1 25 26 27 28 49 52 51 50 a 13 oeba leba gnd a 18 clkab 53 56 55 54 b 10 gnd b 14 b 15 b 13 b 16 b 17 gnd b 18 clkba
cy74fct163500 2 maximum ratings [5, 6] (above which the useful life may be impaired. for user guidelines, not tested.) storage temperature ................................ - 55 c to +125 c ambient temperature with power applied ................................................. - 55 c to +125 c supply voltage range ..................................... 0.5v to +4.6v dc input voltage .................................................- 0.5v to +7.0v dc output voltage ..............................................- 0.5v to +7.0v dc output current (maximum sink current/pin) ...........................- 60 to +120 ma power dissipation .......................................................... 1.0w static discharge voltage............................................>2001v (per mil-std-883, method 3015) notes: 1. h = high voltage level. l = low voltage level. x = dont care. z = high impedance. = high-to-low transition. 2. a-to-b data ?ow is shown, b-to-a data ?ow is similar but uses oeba, leba, and clkba. 3. output level before the indicated steady-state input conditions were established. 4. output level before the indicated steady-state input conditions were established, provided that clkab was low before leab went low. 5. operation beyond the limits set forth may impair the useful life of the device. unless noted, these limits are over the opera ting free-air temperature range. 6. unused inputs must always be connected to an appropriate logic voltage level, preferably either v cc or ground. pin summary name description oeab a-to-b output enable input oeba b-to-a output enable input (active low) leab a-to-b latch enable input leba b-to-a latch enable input clkab a-to-b clock input (active low) clkba b-to-a clock input (active low) a a-to-b data inputs or b-to-a three-state outputs b b-to-a data inputs or a-to-b three-state outputs function table [1, 2] inputs outputs oeab leab clkab a b l x x x z h h x l l h h x h h h l l l h l h h h l h x b [3] h l l x b [4] operating range range ambient temperature v cc industrial - 40 c to +85 c 2.7v to 3.6v
cy74fct163500 3 electrical characteristics over the operating range v cc =2.7v to 3.6v parameter description test conditions min. typ. [7] max. unit v ih input high voltage all inputs 2.0 5.5 v v il input low voltage 0.8 v v h input hysteresis [8] 100 mv v ik input clamp diode voltage v cc =min., i in = - 18 ma - 0.7 - 1.2 v i ih input high current v cc =max., v i =5.5v 1 m a i il input low current v cc =max., v i =gnd. 1 m a i ozh high impedance output current (three-state output pins) v cc =max., v out =5.5v 1 m a i ozl high impedance output current (three-state output pins) v cc =max., v out =gnd 1 m a i odl output low current [9] v cc =3.3v, v in =v ih or v il , v out =1.5v 45 180 ma i odh output high current [9] v cc =3.3v, v in =v ih or v il , v out =1.5v C45 C180 ma v oh output high voltage v cc =min., i oh = C0.1 ma v cc C0.2 v v cc =3.0v, i oh = C8 ma 2.4 3.0 v v cc =3.0v, i oh = C24 ma 2.0 3.0 v v ol output low voltage v cc =min., i ol = 0.1ma 0.2 v v cc =min., i ol = 24 ma 0.3 0.5 i os short circuit current [9] v cc =max., v out =gnd C60 C135 C240 ma i off power-off disable v cc =0v, v out 4.5v 100 m a capacitance [8] (t a = +25?c, f = 1.0 mhz) parameter description test conditions typ. [7] max. unit c in input capacitance v in = 0v 4.5 6.0 pf c out output capacitance v out = 0v 5.5 8.0 pf notes: 7. typical values are at v cc =3.3v, t a = +25?c ambient. 8. this parameter is speci?ed but not tested. 9. not more than one output should be shorted at a time. duration of short should not exceed one second. the use of high-speed test apparatus and/or sampl e and hold techniques are preferable in order to minimize internal chip heating and more accurately re?ect operational values. otherwise prolonged sh orting of a high output may raise the chip temperature well above normal and thereby cause invalid readings in other parametric tests. in any sequence of paramet er tests, i os tests should be performed last.
cy74fct163500 4 power supply characteristics parameter description test conditions typ. [7] max. unit i cc quiescent power supply cur- rent v cc =max. v in 0.2v, v in 3 v cc - 0.2v 0.1 10 m a d i cc quiescent power supply cur- rent (ttl inputs high) v cc =max. v in =v cc C0.6v [10] 2.0 30 m a i ccd dynamic power supply current [11] v cc =max., one input toggling, 50% duty cycle, outputs open, oeab= oeba=v cc or gnd v in =v cc or v in =gnd 50 75 m a/mhz i c total power supply current [12] v cc =max., f 0 =10 mhz ( clkab), f 1 =5 mhz, 50% duty cycle, outputs open, one bit toggling, oeab= oeba=v cc leab=gnd v in =v cc or v in =gnd 0.5 0.8 ma v in =v cc C0.6v or v in =gnd 0.5 0.8 ma v cc =max., f 0 =10 mhz, f 1 =2.5 mhz, 50% duty cycle, outputs open, eighteen bits toggling, oeab= oeba=v cc leab=gnd v in =v cc or v in =gnd 2.5 3.8 [13] ma v in =v cc C0.6v or v in =gnd 2.6 4.1 [13] ma notes: 10. per ttl driven input; all other inputs at v cc or gnd. 11. this parameter is not directly testable, but is derived for use in total power supply calculations. 12. i c =i quiescent + i inputs + i dynamic i c =i cc + d i cc d h n t +i ccd (f 0 n c /2 + f 1 n 1 ) i cc = quiescent current with cmos input levels d i cc = power supply current for a ttl high input (v in =3.4v) d h = duty cycle for ttl inputs high n t = number of ttl inputs at d h i ccd = dynamic current caused by an input transition pair (hlh or lhl) f 0 = clock frequency for registered devices, otherwise zero n c = number of clock inputs changing at f 1 f 1 = input signal frequency n 1 = number of inputs changing at f 1 all currents are in milliamps and all frequencies are in megahertz. 13. values for these conditions are examples of the i cc formula. these limits are specified but not tested.
cy74fct163500 5 switching characteristics over the operating range v cc = 3.0v to 3.6v [,14, 15] cy74fct163500a cy74fct163500c fig. no. [16] parameter description min. max. min. max. unit f max clkab or clkba frequency 150 150 mhz t plh t phl propagation delay a to b or b to a 1.5 5.1 1.5 4.6 ns 1, 3 t plh t phl propagation delay leba to a, leab to b 1.5 5.6 1.5 5.3 ns 1, 5 t plh t phl propagation delay clkba to a, clkab to b 1.5 5.6 1.5 5.3 ns 1, 5 t pzh t pzl output enable time oeba to a, oeab to b 1.5 6.0 1.5 5.4 ns 1, 7, 8 t phz t plz output disable time oeba to a, oeab to b 1.5 5.6 1.5 5.2 ns 1, 7, 8 t su set-up time, high or low a to clkab, b to clkba 3.0 3.0 ns 9 t h hold time, high or low a to clkab, b to clkba 0 0 ns 9 t su set-up time, high or low a to leab, b to leba clock high 3.0 3.0 ns 4 clock low 1.5 1.5 ns 4 t h hold time, high or low a to leab, b to leba 1.5 1.5 ns 4 t w leab or leba pulse width high 3.0 2.5 ns 5 t w clkab or clkba pulse width high or low 3.0 3.0 ns 5 t sk(o) output skew [17] 0.5 0.5 ns ordering information cy74fct163500 speed (ns) ordering code package name package type operating range 4.6 cy74fct163500cpact z56 56-lead (240-mil) tssop industrial cy74fct163500cpvc/pvct o56 56-lead (300-mil) ssop 5.1 cy74fct163500apvc/pvct o56 56-lead (300-mil) ssop industrial notes: 14. minimum limits are speci?ed but not tested on propagation delays. 15. for v cc =2.7, propagation delay, output enable and output disable times should be degraded by 20%. 16. see parameter measurement information in the general information section. 17. skew between any two outputs of the same package switching in the same direction. this parameter is ensured by design.
cy74fct163500 6 package diagrams 56-lead shrunk small outline package o56 56-lead thin shrunk small outline package z56
important notice texas instruments and its subsidiaries (ti) reserve the right to make changes to their products or to discontinue any product or service without notice, and advise customers to obtain the latest version of relevant information to verify, before placing orders, that information being relied on is current and complete. all products are sold subject to the terms and conditions of sale supplied at the time of order acknowledgement, including those pertaining to warranty, patent infringement, and limitation of liability. ti warrants performance of its semiconductor products to the specifications applicable at the time of sale in accordance with ti's standard warranty. testing and other quality control techniques are utilized to the extent ti deems necessary to support this warranty. specific testing of all parameters of each device is not necessarily performed, except those mandated by government requirements. certain applications using semiconductor products may involve potential risks of death, personal injury, or severe property or environmental damage (acritical applicationso). ti semiconductor products are not designed, authorized, or warranted to be suitable for use in life-support devices or systems or other critical applications. inclusion of ti products in such applications is understood to be fully at the customer's risk. in order to minimize risks associated with the customer's applications, adequate design and operating safeguards must be provided by the customer to minimize inherent or procedural hazards. ti assumes no liability for applications assistance or customer product design. ti does not warrant or represent that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other intellectual property right of ti covering or relating to any combination, machine, or process in which such semiconductor products or services might be or are used. ti's publication of information regarding any third party's products or services does not constitute ti's approval, warranty or endorsement thereof. copyright ? 2000, texas instruments incorporated
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